As the number and types of computing devices continues to expand, so does the demand for memory used by such devices. Memory includes volatile memory (e.g. RAM) and non-volatile memory. One popular type of non-volatile memory is flash memory or NAND-type flash. A NAND flash memory array includes rows and columns (strings) of cells. A cell may include a transistor.
During a read operation, an entire row/page of the NAND flash memory array is read. This is done by applying a bias voltage to all rows not being read and a reference threshold voltage to the row that should be read. The bias voltage allows the transistor of the NAND flash memory array to fully conduct. The cells lying on the row being read will conduct only if the threshold voltage is sufficiently high to overcome the trapped charge in the floating gate. A sense amplifier is connected to each string which measures the current through the string and outputs either a “1” or a “0” depending whether the current passed a certain threshold.
Typically, a programming operation includes a process of multiple small charge injection steps. A charge may be injected to a cell by applying a voltage pulse (Vpulse), starting at a voltage Vstart, to the row being programmed and setting the gate voltages of all other transistors in the string to a bias voltage (Vbias). After applying a voltage pulse, the programmed cell is read (using the procedure described above) and compared to the desired programming voltage. If the desired programming voltage is reached, the programming ends. Else, additional pulses are provided—until reaching the desired programming voltage or until reaching a maximum number of pulses (NPP). If, after the maximum number of pulses is used, there remain cells that did not pass the verify test (i.e. they were not programmed to the desired programming voltage), a program error (or failure) can be declared. The programming process includes increasing the level of the voltage pulses (Vpulse) by a voltage increment (Vstep) in a process known as Incremental Step Pulse Programming (ISPP).
The NAND flash memory programming parameters described above (e.g. Vbias, Vstep, Vstart, and NPP) and used in the ISPP process are typically defined to provide a desired trade-off between speed and accuracy. These programming parameters are generally fixed for each device of a common memory product type and used for programming during the entire lifetime of the device.